Now not all STM32's have 0x1000 bytes of ram so sometimes you make that smaller. The addresses for the vectors are address ORRED with 1 and that is correct. As close to zero toolchain specific magic as possible.Īlways check the output to see that if nothing else the vector table looks good notmain.list (I used the disassembler so for example the tool tries to disassemble the vectors, just ignore the disassembly there). I am simply using the compiler as a compiler and the linker as a linker. Now my code is designed to not care about things like arm-none-eabi- vs arm-linux-gnueabi-, the last 10 or 15 years of arm-whatever-whatever should work. There are some unpleasant issues with the command line options including one very long-standing bug that they still have not fixed (the tools are magically kludged to work with the result of the bug so nobody cares I guess).īuild arm-none-eabi-as -warn -fatal-warnings -mcpu=cortex-m0 flash.s -o flash.oĪrm-none-eabi-gcc -Wall -O2 -ffreestanding -mcpu=cortex-m0 -mthumb -c notmain.c -o notmain.oĪrm-none-eabi-ld -nostdlib -nostartfiles -T flash.ld flash.o notmain.o -o notmain.elfĪrm-none-eabi-objdump -D notmain.elf > notmain.listĪrm-none-eabi-objcopy -O binary notmain.elf notmain.bin While the command line -Ttext= and -Tdata= and such are present in the linker, I would advise against using them except for the occasional Stack Overflow answer when being lazy. This is a trivial solution to defeat that. Some tools including the gnu tools will see the main() keyword and add stuff to the binary, that sometimes we do not want. Main/entry C code notmain.c extern void bounce ( unsigned int ) So a very simple example to get you started. Various ways to skin this cat but ST chooses to mirror a percentage of the flash to 0x00000000. The ARM documentation will say 0x00000000 basically or indicate a VTOR thing but in reality it is generally 0x00000000 as the address that the logic looks for to find the vector table on reset. To make a minimal example that is good enough.Īll of the STM32 chips I have worked with (I have worked with a ton of them) support a user flash based at 0x08000000 and SRAM at 0x20000000, some of the newer firmware that comes with nucleo boards will insist on the proper 0x08000000 address in the vector table (some small percentage also support a faster memory address at 0x00200000). The first word is loaded into the stack pointer the second is the reset vector and it is defined as requiring the lsbit to be a 1 (indicating this is a thumb function address). The cortex-ms boot off of a vector table, described in the architectural reference manual (ARM). and the REFERENCE manual from ST (not the programmers manual from either them) and the datasheet from ST. The ARM TRM and ARM ARM for the core and architecture. You should not start this journey without the minimum documents. You can follow the ST documentation to see what cortex-m core it has to the technical reference manual at arms website and in there it says which architecture (armv6-m armv7-m armv8-m.) and in there you find out about the instruction set and the architecture. And so far they all support the cortex-m0 instruction set (armv6-m). The STM32 chips are all cortex-m based (a core they purchase from ARM).
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